Current SoC design is growing +100M insts and +100 scenarios to sign-off, timing closure becomes much difficult and time consuming.
ICExplorer-XTop can provide best-in-class timing ECO solution with higher efficiency, lower cost and silicon accuracy.
  • Adv. Massively Parallel Architecture improves the performance and capacity very much
  • Upg. Physical and Timing Opt. Engines can better support advanced process, better estimate the physical sensitivity and resolve the complicated violations
  • New Timing-Inspection and Interactive-ECO Functions greatly improves the capability and efficiency of the last hot-paths
  • Integrated with ICExplorer-XTime for much lower cost with silicon accurate timing


next:Last page