Empyrean Argus is a hierarchical and parallel physical verification tool that meets the requirements of ultra deep submicron IC designs. It effectively locates the design violations, reduces verification time and improves productivity. By integrating with full-custom IC design platform Aether and chip-finishing layout platform Skipper, Argus provides designers with an end-to-end physical verification solution.

Key Benefit 

  • A reliable sign-off quality physical verification tool 

  • Supports very large (up to 100GB GDS) layout verification 

  • High performance and support both command and data parallel processing 

  • Supports native and industry-standard design rules 

  • Supports both hierarchical and flat DRC & LVS 

  • Integrated with Aether, Skipper and other popular platforms 

  • Comes with PVE physical verification debugging environment 

Key Features 

  • Extremely fast layout vs. layout comparison function 

  • Supports electrical rule checks, such as Path check and Soft-Connect check 

  • High-lights short path efficiently 

  • DRC result sorting by extent of violation 

  • Provides black box option for incremental LVS and LVS after IP Merge 

  • Cross probing between schematic and layout 

Datasheet:
     
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