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Empyrean Announces Hierarchical DRC & LVS Solution Targeting Improving Physical
2015-06-14 23:21:47   来源:   报名:0 点击:


Beijing, China - March 15, 2012, Huada Empyrean Software Co., Ltd (HES), a global supplier of EDA solutions, today unveiled its new version of Argus to support hierarchical DRC and LVS verification. Argus also supports parallel physical verification with industry-leading performance, which effectively locates the design violations, reduces verification time and improves productivity for IC designs.

Argus deploys multiple advanced technologies to guarantee accuracy and productivity. With an advanced geometry algorithm engine, Argus is capable of processing layout precisely and efficiently. Adopting the unique hierarchical processing technique, Argus avoids repetitive calculation to dramatically improve the performance. While how to compare symmetric circuit is always a plaguing problem, HES innovates a break-through graph isomorphism algorithm which not only provides high performance for general circuit but also experts in processing highly symmetric or repetitive circuit. With advanced parallel technology, Argus enables high efficiency verification and gets near linear speedup by multi-threading. Moreover, Argus can efficiently verify very large scale layout by embedding unique data compression and memory management technique.

Argus has been verified by many practical layouts, and satisfies the requirement of ultra-deep submicron IC design in precision and performance. Now, we are cooperating with Foundry and Design House for verification below 65nm, and DFM verification tool will be released soon.

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